仇天元
The pronunciation of my Chinese name is “Chyoh Tyen Ywen” (Qíu Tiān Yuán).
About Me
I am an undergraduate student at the ACM Honors Class of Zhiyuan College, Shanghai Jiao Tong University, majoring in Computer Science and Technology. I will be a PhD student in Purdue University Electrical and Computer Engineering department, mentored by Prof. Xiaoqi Chen.
My research interest lies in the fields of systems and networking. I am particularly drawn to a bottom-up research approach, beginning from the behavior of hardware such as FPGA and PCIe to intermediate layers like operating system, and extending up to applications. This holistic way of thinking about the systems would open the door to identifying performance gaps between different layers and making optimizations with inventive system designs. Along this line, I am broadly interested in various problems in emerging networking and systems, including SmartNIC, FPGA. I am also open to various topics in the broader field of systems, from serverless to databases. Recently, I’m working on improving network performance by offloading with FPGA-based SmartNICs.
This page was updated in February 2024.
Selected Projects
Each project listed was crafted solely by myself and from scratch. Several projects include third-party libraries.
![](https://raw.githubusercontent.com/PaperL/RISC-V_CPU/main/assets/Diagram.png)
![](https://raw.githubusercontent.com/PaperL/Mxx-Compiler/main/assets/Diagram.png)
![](https://raw.githubusercontent.com/PaperL/Toy_Ray_Tracer/master/raytracer/output/preview.jpg)
- Developed a reimplementation of basic part of C++ Standard Library with additional functions, written in C++.
- Implemented A program for reading, parsing, converting, and performing model checking of linear temporal logic formulas, written in Java.
Experience
DSL, University of Pennsylvania
August 2023 - December 2023
Research Assistant, advised by Prof. Vincent Liu
Philadelphia, Pennsylvania, US
- Investigated co-design of the FPGA-based SmartNIC and the host networking stack.
- Leverage idle PCIe transactional bandwidth to mitigate host congestion.
- Optimize tail latencies for high-level applications.
BCMI, Shanghai Jiao Tong University
July 2022 - July 2023
Research Assistant, advised by Prof. Li Niu
Shanghai, China
- Proposed a deep learning network of image harmonization guided by reflectance.
- Designed a diverse reflectance generation network to predict a variety of plausible foreground reflectances.
- Enabled multiple plausible image harmonization results using the outputs from the generation network.
Zhiyuan College, Shanghai Jiao Tong University
September 2021 - June 2023
Teaching Assistant
Shanghai, China
- CS1953 Programming, Fall 2021
- CS1952 Programming Practice, Summer 2022
- CS2951 Computer Architecture, Fall 2022
- CS2952 Operating System, Spring 2023
Skills
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Programming: Proficient in algorithm, data structure, modern programming language features (e.g. C/C++, Python, Java, Rust), HDL (e.g. System Verilog), Database (e.g. MongoDB); Utility programs (e.g. MATLAB, Visual Basic, Unity, Processing).
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Engineering: Exceptional code style, document writing, and version control. Proficient in both Windows and Linux environments. Experienced with industry toolchains and documentation (e.g. Xilinx’s Vivado).
More than coding
My life’s ambition is to make the world a better place.
For my hobbies, I’ve always been passionate about learning new knowledge from science and engineering to humanities and arts, and different cultures all around the world. I especially like music (e.g. J-pop, symphony), graphic design (e.g. poster, font), animation, game as art, and different beverages (e.g. soda, cocktail).
Here is a simple work written in Processing many years ago.